Photonic debonding of next-generation memory architectures fabricated on ultra-thin silicon wafers below 10 µm
PulseForge, a specialist in advanced electronics manufacturing solutions, has reached a major breakthrough in semiconductor manufacturing, in collaboration with a Korean memory manufacturer: successful photonic debonding of next-generation memory architectures fabricated on ultra-thin silicon wafers below 10 µm
This achievement expands on prior demonstrations with the same customer, where PulseForge enabled reliable debonding at a wafer thickness of 15µm. The latest result at less than 10µm is an advancement that addresses one of the most critical barriers in advanced semiconductor manufacturing: handling and debonding ultra-fragile wafers without compromising yield or device integrity.
Reducing wafer thickness is essential to performance. For example, thinning to 20µm has reduced substrate resistance by around 50% and power losses by more than 15%. At the system level, these electrical improvements translate into more energy-efficient AI data centres, facilitating lower power consumption per compute operation, improved thermal management, and higher performance per watt across large-scale GPU and HBM deployments.
The ability to debond at sub-10µm thickness enables transformative advancements across several markets:
Advanced memory (HBM, DRAM, NAND)
- Supports scaling for AI and high-performance computing
- Enables ultra-thin die stacking for next-generation HBM
- Increases bandwidth and enhances thermal performance
Logic and advanced packaging
- Reduces interconnect length, improving latency and performance
- Supports wafer-to-wafer and die-to-wafer stacking
- Enables 3D integration, chiplets, and hybrid bonding
Power semiconductors
- Facilitates thinner, higher-efficiency devices
- Supports electrification and AI data centre power demands
- Reduces conduction losses and substrate resistance
PulseForge’s photonic debonding platform is suitable for ultra-thin wafer processing at scale:
- Cost-of-ownership (COO): Fewer process steps, high throughput, reduced footprint, and lower consumables
- Reduced cleaning requirements: Clean debond interface decreases residue and simplifies post-process cleaning
- Greater yield at extreme thinness: Non-contact, low-stress debonding process prevents wafer breakage below 10µm and preserves device integrity
- Reusable LAL-coated carriers: Enable multiple reuse cycles, lowering consumable cost and improving sustainability
The process is also adhesive-agnostic, allowing integration into existing semiconductor manufacturing flows.
PulseForge has demonstarted capability across a range of material thicknesses:
- ~0.7nm – 2D material / TMDC transfer (imec collaboration)
- Less than 10µm – Silicon wafer debonding (latest milestone, advanced memory)
- Less than 20 and 15µm – Memory architectures (customer validation)
Jonathan Gibson, CEO, PulseForge, said, “Our collaboration with a leading Korean memory manufacturer demonstrates that photonic debonding is not just viable, but essential, for enabling sub-10 micron wafer processing. Our demonstration at ~8 microns establishes photonic debonding as a foundational technology for next-generation memory, logic, and power semiconductor manufacturing.”
With rising demand for AI infrastructure, high-bandwidth memory, and enhanced packaging, photonic debonding is becoming a foundational technology for the semiconductor industry:
- HBM scaling for AI compute
- 3D heterogeneous integration and chiplet architectures
- Energy-efficient power electronics for data centres
