Renesas adds first low-voltage GaN FETs for AI data centres and robotics to GaN portfolio

Renesas Electronics Corporation, a supplier of advanced semiconductor solutions, has expanded its GaN portfolio into low-voltage applications with its first family of 100V enhancement mode (E-mode) GaN-based discrete power transistors.

The RTP100E005G1FL, RTP100E2P6G1FL, RTP100E1P8G1FL-DSC and RTP100E1P2G1FL-DSC low-voltage GaN FETs provide ultra-fast switching speeds and improved thermal performance in efficiency-critical, high-power-density applications, including AI data centres, humanoid robotics, factory automation and industrial motor drives, power tools, and solar microinverters.

The new GaN FETs deliver excellent hard- and soft-switching figure-of-merit (FOM) performance,with up to 35% lower hard-switching FOM and up to 63% lower soft-switching FOM than comparable GaN devices. The low-voltage GaN devices also maintain a silicon-compatible footprint, enabling easy adoption into existing designs.

Power converters in modern data centres typically operate at switching frequencies of a few hundred kilohertz. However, as AI servers and industrial infrastructure transition to 800 VDC power distribution and 48V bus architectures, many converter stages are moving toward megahertz-class switching to shrink magnetics, increase power density and enhance overall efficiency.

Using low-voltage GaN in 800V high-voltage direct current (HVDC) power architectures simplifies power-conversion design, reducing passive-component size, switching losses, and cooling requirements. At the system level, this improves efficiency, reduces thermal management requirements, and lowers energy and BOM costs.

Broad GaN Portfolio Yields Greater Efficiency, Power Density and Design Flexibility

Built on Renesas’ expanded low-voltage E-mode GaN technology platform, this new transistor portfolio delivers ultra-fast GaN switching with low total gate charge (Qg) and output charge (Qoss), reducing the overlap between voltage and current. It reduces energy lost in each conversion cycle across AI power supply units, motor drives, and DC-DC power stages. The devices also provide zero reverse recovery (Qrr=0), eliminating energy losses for immediate switching efficiency gains.

Fast switching increases power density and enables higher-frequency operation by shrinking the PCB footprint and reducing the size of magnetic and passive components, while low RDS(on) improves efficiency by reducing conduction losses. Available bottom- and dual-side cooling configurations provide added heat dissipation and design flexibility. Depending on application requirements and power-conversion architecture, low-voltage GaN devices can deliver 40-70% lower switching losses and up to twice the system-level power density.

The new GaN transistors are available in multiple standard MOSFET-compatible packages, enabling customers to migrate from silicon MOSFET layouts faster, with minimal PCB rework. The package options, combined with a wide RDS(on) range, let designers scale across power levels and applications, including synchronous rectification, multiphase buck conversion, and motor drives.

Akhil Nair, senior director, Low-Voltage GaN at Renesas, said,  “Customers adopting next-generation GaN technology for AI servers, robotics, industrial motor drives and renewable energy systems are looking for ways to deliver more efficient power conversion performance from increasingly compact systems. Our low-voltage GaN family delivers the efficiency, switching performance and power density designers expect from GaN while making it significantly easier to transition from existing silicon MOSFET designs.”

High GaN Performance in Silicon-Compatible Footprints

The new GaN family is built on E-mode GaN technology, offering GaN’s performance advantages in a convenient, silicon-compatible footprint. This enables designers to capture GaN’s efficiency and power benefits while simplifying migration from existing silicon-based designs.

Key features include:

  • 1 to 3% higher efficiency over silicon-based designs, eliminating Qrr loss
  • Drastic 40 to 70% reduction in switching losses
  • Doubled power density by reducing switching energy per cycle and supporting high-frequency operation
  • Smaller system footprint with higher switching frequency reducing magnetics size and lowering overall system losses
  • Optimised thermal management reduces fan and active cooling requirements, cutting system complexity and BOM cost

Its lower total energy consumption per power stage helps designers meet sustainability objectives. This is achieved by reducing the size of fans required for thermal and airflow management, enabling smaller magnetics and a smaller overall PCB footprint, and supporting AI data centre and industrial energy-efficiency targets.

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